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Design and implementation of high performance floating-point multiply acculate for M-DSP
CHE Wenbo, LIU Hengzhu, TIAN Tian
Journal of Computer Applications    2016, 36 (8): 2213-2218.   DOI: 10.11772/j.issn.1001-9081.2016.08.2213
Abstract431)      PDF (1001KB)(309)       Save
In order to meet the requirements on performance, power, area of floating-point computing in M-DSP, the architecture of a M-DSP, as well as the characteristics of all the instructions related to its floating-point computing were analyzed, and a Floating-point Multiply ACcumulate (FMAC) with high performance and low power was proposed. The proposed FMAC has structure with separated single and double precision path, which was divided into 6-stage pipelines; its key modules including multiplier and shift device were designed for reuse, and the operations including single and double precision floating-point multiplication, multiply-add and multiply-sub, floating-point complex multiplication, dot product, etc. were all implemented in it. The proposed FMAC was fully verified and synthesized by using Design Compiler with 45nm technique of Synopsys Company. Experimental results show that the frequency of the proposed FMAC is up to 1GHz, the area is 36856μm 2; compared with the FMAC of FT-XDSP, the area is saved by 12.95%, and the critical path was shortened by 2.17%.
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Shortest cyclic quorum generation algorithm based on number of repetitions
LIU Heng LI Meian SU Meng
Journal of Computer Applications    2014, 34 (5): 1263-1266.   DOI: 10.11772/j.issn.1001-9081.2014.05.1263
Abstract323)      PDF (729KB)(325)       Save

When the length of the cyclic quorum is the shortest in distributed system, the space complexity and the time complexity of the existing quorum generation algorithm are too high, a new shortest cyclic quorum generation algorithm was presented. Based on the theory of relaxed cyclic difference set, adding elements to the quorum in turn was judged by the condition of maximum allowable number of repetitions. The simulation results show that, when the system node number is 70 to 90, the length of the cyclic quorum is the shortest and the space complexity is O(2n), the time complexity is 3.6E-03 to 6.8E-07 of that of the exhaustive search, and the time complexity of the shortest cyclic quorum generation algorithm is reduced.

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Star pattern recognition algorithm of large field of view based on concentric circles segmentation
LIU Heng ZHENG Quan QIN Long ZHAO Tianhao WANG Song
Journal of Computer Applications    2013, 33 (07): 1984-1987.   DOI: 10.11772/j.issn.1001-9081.2013.07.1984
Abstract669)      PDF (706KB)(435)       Save
Since the triangle identification algorithm commonly utilized in star sensitive system is of high data redundancy and low recognition speed, especially initial recognition speed, a concentric circles-based star pattern recognition algorithm of large Field Of View (FOV) was proposed. After analyzing the information of star map to acquire its main star, draw eight concentric circles around the main star at some certain radiuses, then figure out the number of stars in each annulus based on the coordinates to obtain the distributional vector of companion stars. Construct the navigation star feature database from the base database with the utilization of the same method, so as to process the pattern matching with the distributional vector to acquire star pattern recognition result. The vectors in the database will be sorted by the first dimensional element in order to accelerate the process of recognition. The simulation results show that this algorithm needs much less storage space of navigation star feature database, and possesses good real-time and noise resistance, and high recognition rate. It takes 95.3μs recognition time to achieve more than 88.9% accuracy, and it also can be integrated with other recognition algorithms and performance in different stages to realize more efficient and accurate celestial navigation.
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Lock-free implementation of concurrent binary search tree
LIU Shao-dong XING Yong-kang LIU Heng
Journal of Computer Applications    2012, 32 (10): 2736-2741.   DOI: 10.3724/SP.J.1087.2012.02736
Abstract894)      PDF (806KB)(548)       Save
A new scheme for unlocking implementation of concurrent Binary Search Tree (BST) based on asynchronous shared memory systems was provided in this paper. This scheme possessed two outstanding advantages: The deletion is wait-free, and the insertion is lock-free. The experimental results show that this scheme is highly scalable and can produce high throughputs under heavy load.
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